MC14543BCP-DIP
AED 5.00
In stock
In stock
Stock | Location | Shipping Method | ETA | Cost |
Available | Abu Dhabi | Self Pickup | Wednesday-Saturday: Will be available for pick up on Tuesday Sunday-Tuesday: Will be available for pickup on Thursday | Free |
---|---|---|---|---|
Available | Dubai | Self Pickup | 1-2 Days | Free |
Available | UAE Remote Areas | Delivery | 4-5 days | 22 AED / Free Above 50 AED |
Available | UAE Urban Areas | Delivery | 2-3 Days | 22 AED / Free Above 50 AED |
Available | International | Delivery | 4-7 days | 180 AED | 49 $ |
Pre-Order | General | 2-3 weeks |
Payment Methods:
The MC14543B BCD–to–seven segment latch/decoder/driver is designed for use with liquid crystal readouts, and is constructed with complementary MOS (CMOS) enhancement mode devices. The circuit provides the functions of a 4–bit storage latch and an 8421 BCD–to–seven segment decoder and driver. The device has the capability to invert the logic levels of the output combination. The phase (Ph), blanking (BI), and latch disable (LD) inputs are used to reverse the truth table phase, blank the display, and store a BCD code, respectively. For liquid crystal (LC) readouts, a square wave is applied to the Ph input of the circuit and the electrically common backplane of the display. The outputs of the circuit are connected directly to the segments of the LC readout. For other types of readouts, such as light–emitting diode (LED), incandescent, gas discharge, and fluorescent readouts, connection diagrams are given on this data sheet. Applications include instrument (e.g., counter, DVM etc.) display driver, computer/calculator display driver, cockpit display driver, and various clock, watch, and timer uses.
•Latch Storage of Code
•Blanking Input
•Readout Blanking on All Illegal Input Combinations
•Direct LED (Common Anode or Cathode) Driving Capability
•Supply Voltage Range = 3.0 V to 18 V
• Capable of Driving 2 Low–power TTL Loads, 1 Low–power Schottky TTL Load or 2 HTL Loads Over the Rated Temperature Range
•Pin–for–Pin Replacement for CD4056A (with Pin 7 Tied to VSS).
•Chip Complexity: 207 FETs or 52 Equivalent Gates
Product Attributes :
Specification
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GENERIC |
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