The HEF4104B quadruple low voltage to high voltage translator with 3-state outputs provides the capability of interfacing low voltage circuits to high voltage circuits,such as low voltage LOCMOS and TTL to high voltageLOCMOS. It has four data inputs (I0 to I3), an active HIGHoutput enable input (EO), four data outputs (O0 to O3) and their complements (O0 to O3). With EO HIGH, O0 to O3 and O0 to O3 are in the low impedance ON-state, either HIGH or LOW as determined by I0to I3; with EO LOW, O0 to O3 and O0 to O3 are in the high impedance OFF-state. The device uses a common negative supply (VSS) and separate positive supplies for inputs (VDDI) and outputs(VDD0). VDDI must always be less than or equal to VDDO,even during power turn-on and turn-off. For the permissible operating range of VDDI and VDDO see graph Fig.4. Each input protection circuit is terminated between VDDO and VSS. This allows the input signals to be drivenfrom any potential between VDDO and VSS, without regard to current limiting. When driving from potentials greater than VDDO or less than VSS, the current at each input must be limited to 10 mA.