HCF4076BE-DIP

TheHCC/HCF4076Btypes are four-bit registersconsisting of D-type flip-flops that feature three-state outputs. Data Disable inputs are provided to control the entry of data into the flip-flops. When bothData Disable inputs are low, data at the D inputs are loaded into their respective flip-flops on the next positive transition of the click input. Output Disable Inputs are also provided. When the Output Disable Inputs are both low, the normal logic states of the four outputs are available to the load. The outputs are disabled independently of the clock by a high logic level at either Output Disable input, and pres-ent a high impedance.