The DIP-14 SN74LS107AN is a two independent Negative-Edge-Triggered Flip-flop with J and K inputs must be stable prior to the high-to-low clock transition for predictable operation. When the clear is low, it overrides the clock and data inputs forcing the Q output low and the Q\ output high.
7V Input voltage
2V High-level input voltage
0.8V Low-level input voltage
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